In principle, the command processing of a processor core follows the von Neumann cycle. The address of the next machine instruction is read from the instruction address register. This is (more precisely, from the L1 cache) loaded from memory into the instruction register.
The command decoder decodes the command and activates corresponding circuits necessary for the execution of the command. Where to load additional data (required parameter), they are loaded from the L1 cache in the working register.
The GPU Compare command is executed. This can be, for example operations in the arithmetic unit, a jump in (a change of command address register), writing back results into the main memory or the control of peripheral GPU Compare devices.
Depending on the output of some commands, the status register is set, which can be evaluated by subsequent commands. If no branch instruction is to be performed in the execute stage, the instruction address register is then incremented by the length of the instruction, so that it points to the next machine instruction.
The hardware of a computer can make requests to the processor. Since these requests occur asynchronously, the processor is forced to regularly check if such requests exist, these may need to be emended before continuation of the actual program.
All programs are available as a sequence of binary machine instructions in memory. Only these GPU Compare commands can be processed. This code is almost impossible for a human to read.
For this reason, programs (such as BASIC, C , C + +, Java), are initially written in assembly language or a high-level language and then translated by a compiler into an executable file, that is, in machine language or run through an interpreter at runtime.
To make it possible to write programs in a reasonable time, a symbolic notation for machine instructions was introduced (the assembly language). A keyword is assigned in assembly language to handle a machine instruction.
Since each processor has its own type of machine instructions, there is also a separate assembly language for it. Processor independent programming is possible only with the use of a high-level language, but the corresponding compiler is again processor specific.
Commands that are needed for each processor, are usually the same. The order of execution of assembler commands from the processor type, are shown in the following example: MOV BX, $ 85F3 The value at address 85F3 ( hexadecimal notation ) is in the memory, it is loaded into the working register BX. ADD BX, 15 The value of 15 is added to the contents of the working register BX.